The Analysis of Coulomb Blockade in Fullerene Single Electron Transistor at Room Temperature

Document Type : Original Research Paper


1 Department of Electrical Engineering, Pardis of Urmia University, Urmia, Iran

2 Nanotechnology Research Center, Nano electronic Research Group, Physics Department, Urmia University, Urmia, Iran

3 Faculty of Electrical Engineering, Universiti Teknologi Malaysia, 81310, UTM Johor Bahru, Johor, Malaysia

4 Department of Electrical Engineering, Urmia University, Urmia, Iran


The Graphene based single electron transistor (SET) as a coulomb blockade device need to be explored .It is a unique device for high-speed operation in a nano scale regime. A single electron transfers via the coulomb barriers, but its movement may be prevented by coulomb blockade, so its effect is investigated in this research. The conditions of coulomb blockade and its controlling factors such as material, temperature, gate voltage and island length are investigated. At first, the coulomb blockade on fullerene SET as a nano transistor with new material is modeled and compared with experimental data of silicon SET. The comparison study indicates that the coulomb blockade range of fullerene SET is lower than the silicon one. On the other hand, the analysis demonstrates that, temperature and gate voltage play direct associations with zero current SET. In addition, island length and its material effect on coulomb blockade and desired current are achieved by decreasing the coulomb blockade range.


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